4 research outputs found

    Network enabled partial reconfiguration for distributed FPGA edge acceleration

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    Partial reconfiguration supports virtualisation of applications on FPGAs, enabling compute to dynamically adapt to workloads in distributed infrastructure and datecenters. While the latter often makes use of the PCIe interface and supporting infrastructure to allocate and load compute kernels via a host CPU, FPGAs are becoming increasingly popular as standalone resources in edge-computing, requiring them to manage ac- celerators autonomously. This paper presents a platform that supports the managing of accelerator bitstreams over the network interface on a Xilinx Zynq device without intervention by the Arm processor. We compare against traditional vendor provided PR management for both library accelerators and custom acceler- ators and show that we achieve a 29% decrease in reconfiguration trigger latency using this approach

    Build framework and runtime abstraction for partial reconfiguration on FPGA SoCs

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    Growth in edge computing has increased the requirement for edge systems to process larger volumes of real-time data, such as with image processing and machine learning; which are increasingly demanding of computing resources. Offloading tasks to the cloud provides some relief but is network dependant, high latency and expensive. Alternative architectures such as GPUs provide higher performance acceleration for this type of data processing but trade processing performance for an increase in power consumption. Another option is the Field Programmable Gate Array; a flexible matrix of logic that can be configured by a designer to provide a highly optimised computation path for incoming data. There are drawbacks; the FPGA design process is complex, the domain is dissimilar to software and the tools require bespoke expertise. A designer must manage the hardware to software paradigm introduced when tightly-coupled with general purpose processor. Advanced features, such as the ability to partially reconfigure (PR) specific regions of the FPGA, further increase this complexity. This thesis presents theory and demonstration of custom frameworks and tools for increasing abstraction and simplifying control over PR applications. We present mechanisms for networked PR; a mechanism for bypassing the traditional software networking stack to trigger PR with reduced latency and increased determinism. We developed a build framework for automating the end-to-end PR design process for Linux based systems as well as an abstracted runtime for managing the resulting applications. Finally, we take expand on this work and present a high level abstraction for PR on cyber physical systems, with a demonstration using the Robot Operating System. This work is released as open source contributions, designed to enable future PR research

    Build automation and runtime abstraction for partial reconfiguration on Xilinx Zynq UltraScale+

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    Partial reconfiguration (PR) is fundamental to build- ing adaptive systems on modern FPGA SoCs, where hardware can be adapted dynamically at runtime. Vendor supported reconfiguration is performance limited, drivers entail complex memory management, and software/hardware design requires detailed knowledge of the underlying hardware. This paper presents a collection of abstractions that provide high performance reconfiguration of hardware from within the Linux userspace, automating the process of building PR applications, and adding support for the Xilinx Zynq UltraScale+ architecture. We compare our abstractions against vendor tooling for PR management and open source tools supporting PR within Linux. Our tools provides automation and abstraction layers, from defining PR configurations through to compiling and packaging Linux with support for userspace PR control, targeted for non- experts

    Rubber-toughened epoxy loaded with carbon nanotubes: structure-property relationships

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    The paper reports on the preparation, structure and properties of ternary thermosetting blends, based on DGEBA epoxy, cured with 3,3′-DDS and modified by the addition of CTBN reactive liquid rubber and/or 0.3wt% of commercial multi- walled carbon nanotubes. The toughening effect of the phase-separated rubber particles is enhanced by the presence of the nanotubes, through a change in the morphology. In the absence of the rubber, the nanotubes alone produce a minimal effect upon the thermo-mechanical characteristics of the resin. However, the electrical conductivity of the cured resin samples is found to increase by five orders of magnitude, up to 3.6×10-3 S/m in the ternary bl
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